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algebraic error correcting code - translation to russian
![In 1982 this 512KB memory board from [[Cromemco]] used 22 bits of storage per 16 bit word to allow for single-bit error correction](https://commons.wikimedia.org/wiki/Special:FilePath/Cromemco 512MSU error correcting S-100 memory storage unit.jpg?width=200 "In 1982 this 512KB memory board from [[Cromemco]] used 22 bits of storage per 16 bit word to allow for single-bit error correction")
![Two 8 GB [[DDR4]]-2133 ECC 1.2 V [[RDIMM]]s](https://commons.wikimedia.org/wiki/Special:FilePath/Two 8 GB DDR4-2133 ECC 1.2 V RDIMMs.jpg?width=200 "Two 8 GB [[DDR4]]-2133 ECC 1.2 V [[RDIMM]]s")
![A block code (specifically a [[Hamming code]]) where redundant bits are added as a block to the end of the initial message](https://commons.wikimedia.org/wiki/Special:FilePath/Block code error correction.png?width=200 "A block code (specifically a [[Hamming code]]) where redundant bits are added as a block to the end of the initial message")
![A continuous code [[convolutional code]] where redundant bits are added continuously into the structure of the code word](https://commons.wikimedia.org/wiki/Special:FilePath/Convolutional code error correction.png?width=200 "A continuous code [[convolutional code]] where redundant bits are added continuously into the structure of the code word")
Definition
Ошибка, оговорка, досадный промах (обычно в устной речи и на письме).
Wikipedia
Error correction code memory (ECC memory) is a type of computer data storage that uses an error correction code (ECC) to detect and correct n-bit data corruption which occurs in memory. ECC memory is used in most computers where data corruption cannot be tolerated, like industrial control applications, critical databases, and infrastructural memory caches.
Typically, ECC memory maintains a memory system immune to single-bit errors: the data that is read from each word is always the same as the data that had been written to it, even if one of the bits actually stored has been flipped to the wrong state. Most non-ECC memory cannot detect errors, although some non-ECC memory with parity support allows detection but not correction.
